DON PREFONTAINE
2018-09-20 12:49:21 UTC
Eagle v9.1.3 Standard
IC: CY62256NLL-70PXC
Library: memory-sram Static RAMS (urn:adsk.eagle:library:278)
Sub-library: CY62256LL-?*
Item: CY62256LL-PXC DIL28-6
The Symbol shows one object for the chip and two other devices that are VCC and GND. They seem to be categorized as P in the Symbol drawing, obviously for Power.
Here's the question: how do I put a decoupling cap on schematic for the IC if the power pins only show on the board?
Thanks,
Don
P.S. Is there an easier/faster way to add antispike/decoupling caps to ICs in the schematic? Has anyone done a video on this?
--
To view any images and attachments in this post, visit:
https://www.element14.com/community/message/245009
Attachments:
32KB-SRAM_Symbol.jpg
IC: CY62256NLL-70PXC
Library: memory-sram Static RAMS (urn:adsk.eagle:library:278)
Sub-library: CY62256LL-?*
Item: CY62256LL-PXC DIL28-6
The Symbol shows one object for the chip and two other devices that are VCC and GND. They seem to be categorized as P in the Symbol drawing, obviously for Power.
Here's the question: how do I put a decoupling cap on schematic for the IC if the power pins only show on the board?
Thanks,
Don
P.S. Is there an easier/faster way to add antispike/decoupling caps to ICs in the schematic? Has anyone done a video on this?
--
To view any images and attachments in this post, visit:
https://www.element14.com/community/message/245009
Attachments:
32KB-SRAM_Symbol.jpg